Intel’s Innovation 2023 event marked the first time the chip giant communicated its future client products to the general public. It unveiled many of the technologies developed over several years and outlined what we can expect from as early as December 2023, extending into 2025 and beyond.
While the main focus of the event, for consumers at least, was on Intel’s upcoming mobile Core products, it’s important to note that many of the technological advancements and changes introduced in these products will also find their way into the next generation of desktop products. In particular, Arrow Lake/15th Gen CPUs which are expected to debut in the second half of 2024.
At the core of Intel’s innovation lies their much-vaunted Foveros technology. If you haven’t heard of Foveros, it’s Intel’s new 3D packaging technology which is key to enabling a tighter integration of diverse dies within the same package. This multi-chip, single-package concept bears a resemblance to what we see in current Raptor Lake-based MCP mobile products, particularly at a high level.
This approach, when using Foveros packaging, however, proves much more cost-effective and power-efficient as it incorporates multiple chips from varying manufacturing nodes within a tightly packed single package, rather than relying on a single monolithic die or multiple chips on a package. This is called disaggregated design.
For Meteor Lake, Intel calls these multiple chips “tiles” and plans to carry this approach into future CPUs. This marks a significant departure from the decades-long practice of an aggregated monolithic design encompassing CPU, GPU, SOC, and IO into a single die for client products. This new design allows previously unattainable levels of modularity and process node flexibility for Intel client CPUs.
Given the escalating costs and complexities associated with smaller manufacturing nodes, it has become unsustainable to continue scaling performance in the traditional manner of monolithic dies. While the computing components of the CPU benefit substantially from advanced process nodes, other elements, such as IO (Input/Output), do not. Additionally, numerous aspects of a CPU beyond the computing logic require validation for new process nodes, incurring additional expenses for parts that will reap the most minimal of gains.
As a result, Intel has opted to reserve its most advanced manufacturing capabilities exclusively for compute tiles, employing alternative processes, including external ones from TSMC, for the remaining components of the CPU. These components are subsequently brought together through Foveros into a single package, closely resembling a traditional single die. Meteor Lake and forthcoming CPUs will feature four such tiles for Graphics, SOC, IO, and Compute, affording Intel a myriad of opportunities in terms of product positioning, release schedules, and more.
Key to making all this possible is Foveros 3D packaging, as it allows Intel to harness the advantages of multi-chip packaging and disaggregation while minimizing drawbacks. Unlike standard disaggregated designs, Intel’s approach with Foveros actually enhances power efficiency, a crucial consideration for CPU design and a topic we’ll explore in greater depth when evaluating Meteor Lake products in future.
Equally exciting in Intel’s presentation is the affirmation that the company is adhering to its promise of delivering four processing nodes within five years. This achievement is feasible because Intel has flexibility in advancing its manufacturing processes, reserving cutting-edge nodes exclusively for the compute tile. This streamlined approach facilitates a more aggressive stance on node advancement, ensuring Intel can adhere to its roadmaps more efficiently. Meteor Lake will see Intel 4 (formerly known as Intel’s 7nm node) based CPUs released on time, due in part to the exclusive use of this process node on the compute tile.
For end users, this means more frequent updates and faster computational advancements reaching the market. This change in product development could mean extended lifecycles for platforms that’ll continue to benefit via Graphics and Compute tile updates while IO and SOC tiles remain unaltered.
For instance, a Z890 (or its equivalent at the time) motherboard could remain compatible with several generations of CPUs, each one delivering large performance gains in graphics and compute capabilities. Such motherboards may prove more cost-effective in the long run due to their extended product life cycle. This single change could address criticism from PC DIY enthusiasts who repeatedly express dissatisfaction with the frequent and sometimes annual introduction of new chipsets (thus motherboards) necessary to support new CPU generations.
While specific details about Arrow Lake remain undisclosed, the transition to a new LGA 1851 socket suggests expanded IO capabilities. Intel has mentioned that Meteor Lake incorporates a rich array of IO features from SOC and IO tiles, including WIFI 7, Bluetooth 5.4, USB4/Thunderbolt, USB3/2, and more. As such, it’s reasonable to expect a similar IO feature set for Arrow Lake, at least for some high-end models. The disaggregated design and Foveros packaging make it possible for various CPUs to utilise different combinations of tiles for different SKUs, all utilising the same socket and motherboard.
One of the most obvious use cases for disaggregated design and Foveros is within Intel’s K and KF CPU models. These are physically identical except for the KF SKUs having the IGP disabled. This disabling of the IGP serves various purposes but primarily addresses yield-related concerns. Before the introduction of KF CPUs, CPU dies with graphics logic that didn’t meet Intel’s specifications or simply didn’t function were subject to disposal. This process was significantly inefficient, especially considering that each 300mm (12-inch) wafer typically houses over 200,000 dies. Even with a yield rate of 90% or higher (representing the percentage of fully functional chips on a wafer), this meant tens of thousands of CPU die going to waste. Instead of discarding these imperfect dies, Intel chooses to disable or fuse off the problematic graphics section of the monolithic die, designating the CPU as a KF variant.
While this approach salvages what would otherwise be wasted, it falls short of the effectiveness achieved by isolating the graphics portion as a wholly separate die. In the context of Meteor Lake and future designs, adopting a separate tile for graphics proves significantly more efficient. While fused-off sections of a die generally incur no power consumption, they do impair performance per square millimetre and impact thermal characteristics, among other factors. A tiled approach circumvents this issue, as the failure of graphics tiles does not affect other tiles in any way.
This reduced wastage and flexibility are unprecedented in Intel’s client offerings, partly explaining why Arrow Lake will be available on both mobile and desktop products. While Meteor Lake exclusively targets the mobile segment, it sets the stage for this design paradigm at Intel. Leveraging Foveros and disaggregation, Intel can cater to environments ranging from sub-10W configurations to 100W+ applications, optimizing tile combinations and their variations for maximum efficiency and minimum wastage.
Intel hasn’t provided specific examples of all possible configurations for tiles, but envisioning a CPU with a small compute die featuring fewer P-Core and E-core units alongside a large, fully-enabled graphics tile boasting thousands of shader units is not beyond the realm of possibility. Alternatively, Intel could create desktop CPUs with one or two compute tiles that are devoid of any graphics component. The potential for diverse and innovative combinations at Intel is virtually endless.
The progress achieved by TSMC in their process nodes, which Intel has incorporated, enables quicker implementation in shipping products, as there’s no requirement to synchronise the manufacturing processes of all other tiles. Foveros packaging facilitates the harmonious collaboration of tiles with their distinct manufacturing nodes.
This editorial has covered only a portion of what Intel unveiled at the Innovation 2023 event. There is much more to explore regarding Meteor Lake and its component tile capabilities. We will delve deeper into these topics in future editorial pieces.
With all that said, the wait for Meteor Lake-based products won’t be long, as Intel announced an official launch date of December 14th 2023. On the desktop front, the next-generation Core CPUs are set to arrive on shelves within weeks. While they may not feature Foveros’ advanced packaging or a disaggregated design, they mark the end of an era for Intel’s monolithic die CPUs. We eagerly anticipate more details when the official review embargo lifts sometime in October 2023.